深圳市中立信电子科技有限公司

The MCF52259 microcontroller family (MCF52252,

MCF52254, MCF52255, MCF52256, MCF52258, and

MCF52259 devices) is a member of the ColdFire family of

reduced instruction set computing (RISC) microprocessors.

This document provides an overview of the 32-bit MCF52259

microcontroller, focusing on its highly integrated and diverse

feature set.

This 32-bit device is based on the Version 2 ColdFire core

operating at a frequency up to 80 MHz, offering high

performance and low power consumption. On-chip memories

connected tightly to the processor core include up to 512 KB

of flash memory and 64 KB of static random access memory

(SRAM). On-chip modules include:

• V2 ColdFire core delivering 76 MIPS (Dhrystone 2.1) at

80 MHz running from internal flash memory with

Enhanced Multiply Accumulate (MAC) Unit and hardware

divider

• Cryptography Acceleration Unit (CAU).

• Fast Ethernet controller (FEC)

• Mini-FlexBus external bus interface available on 144 pin

packages

• Universal Serial Bus On-The-Go (USBOTG)

• USB Transceiver

• FlexCAN controller area network (CAN) module

• Three universal asynchronous/synchronous

receiver/transmitters (UARTs)

• Two inter-integrated circuit (I2C) bus interface modules

• Queued serial peripheral interface (QSPI) module

• Eight-channel 12-bit fast analog-to-digital converter

(ADC) with simultaneous sampling

• Four-channel direct memory access (DMA) controller

• Four 32-bit input capture/output compare timers with

DMA support (DTIM)

• Four-channel general-purpose timer (GPT) capable of

input capture/output compare, pulse width modulation

(PWM), pulse-code modulation (PCM), and pulse

accumulation

• Eight-channel/Four-channel, 8-bit/16-bit pulse width

modulation timer

• Two 16-bit periodic interrupt timers (PITs)

• Real-time clock (RTC) module with 32 kHz crystal

• Programmable software watchdog timer

• Secondary watchdog timer with independent clock

• Interrupt controller capable of handling 57 sources

• Clock module with 8 MHz on-chip relaxation oscillator

and integrated phase-locked loop (PLL)

• Test access/debug port (JTAG, BDM)